1. Field of the Invention
The present invention is related to performance measurements in processing systems and processors. In particular, the present invention relates to a processor core having a saturating event counter for making processor performance measurements.
2. Description of Related Art
Performance measurements are used in both system component and software evaluation, as well as in run-time applications such as workload balancing, resource usage accounting and other functions in computer systems in which a measurement of the efficiency or throughput of a workload executing within the computer system is needed. Performance monitoring can be performed in both hardware and software in order to measure and monitor performance of the system. Performance-related events, which may be events indicative of low performance such as cache misses, thread stalls, and the like, or may be events indicative of high performance such as instruction completions or instruction dispatches, can be detected to provide a indication of performance of a system, software or a particular component of a system such as a processor core.
Performance monitors can be implemented using counters that count occurrences of events having a frequency indicative of performance of the computer system. A counter-based event monitoring approach typically requires frequency monitoring of the performance counter count values, so that overflow of the counters and consequent wrap-around due to an occurrence of a large number of performance events is not missed. In such monitors, counter overflow may be allowed to occur and is taken into account, or overflow can be prevented by resetting the counter at a periodic rate that ensures that overflow will not occur, e.g., when the counter is read. However, either of the above-described approaches can lead to an erroneous condition, in which a low count value results when, in fact, a large number of performance events have occurred in the preceding measurement interval. Additionally, typical performance counter implementations do not readily provide information about temporal distributions of performance-related events, as it is difficult to identify when a previous performance-related event occurred in relation to the time of occurrence of another performance-related event.
Therefore, it would be desirable to provide performance monitoring in a computer system that does not require management of counter overflows or that requires periodically resetting the counters.